. Design and development of Post Si Validation framework. Definition of Post Silicon Validation Plan. Development and Execution of Firmware developed on emulation platform-FPGA as well as Silicon.
. Using lab instruments and tools; debug hardware/firmware, root-cause the failure and report failures which involves working with cross functional teams across the world.
. The candidate needs to complete the thesis work as necessary by the educational institution which will be co-examined by Seagate professional guide and guide from Institution
Candidates should be in their final year of Bachelors or Masters degree with a requirement of 1 year internship as part of course. Candidates should possess following skills and technical knowledge:
Good understanding of digital design such as Boolean gates, truth tables, combinational circuits, sequential circuits, state machines, counters. Should be able to design few gates circuits for smaller applications. Problem solving capability in logic design and analog design.
Good understanding of timing concepts like setup time, hold time requirements, calculations of maximum frequency of circuit operations, effect of transition and load on circuit performance, power etc.
Basic understanding of CMOS fabrication process.
Basic understanding of layout design for CMOS, BJT, etc.
Basic understanding of power dissipation in different types of circuits.
High level understanding of ASIC design flow.
Good understanding Object Oriented Programming Concepts.
It is desirable to have exposure to HDLs (Verilog or VHDL) and standard EDA Simulation Tools used in ASIC design.
Should be able to understand the inputs required to perform the tasks, intermediate goals, evaluate the outcome of the tasks and analyze the results.
Must be technically adept and a strong team player.
A self-starter with good communication and problem solving skills.
Experience : 0 yrs
Salary : Not specified
Job Location : Pune
Qualification : BE/B.Tech, M.Tech
Company Name : SEAGATE TECHNOLOGY
Company Address : NA
Company Profile : Seagate’s R&D site in Pune has expertise in System-on-a-chip (SoC) development (design, physical design, verification, pre/post silicon validation, platforms), storage and controller firmware (design, development, test). The site’s R&D primarily supports development of controller technology for flash products and software for test equipment, enclosures and subsystems used in cloud solutions.
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