Any Graduate Fresher’s required for the position Senior Analog/Mixed-Signal Lead Engineer in Intel at Bangalore. Interested and eligible candidates who have strong skill sets on desired profile can apply online for the requirement with the link given below. Find the job description, eligibility criteria, exact venue and interview details for more information.
Intel Hiring Any Graduate freshers 2016 for Senior Analog/Mixed-Signal Lead Engineer at Bangalore. Candidates who have completed Any Graduate can apply for this job from Intel.
Key Highlight About the Recruitment Notification:
||Senior Analog/Mixed-Signal Lead Engineer
|Total No Of Vacancy
Eligibility & Details:
Senior Analog/Mixed-Signal Lead Engineer :
Candidates can Get the Senior Analog/Mixed-Signal Lead Engineer Post details such as Post name, Number of vacancy, Qualification, Job Description, Candidate Profile, Company Profile and etc., from the table given below.
|Post Name: Senior Analog/Mixed-Signal Lead Engineer
|Total Vacancy: NA
|Education required: Any Graduate
- We are an end-to-end design team based in Bangalore part of the Server Development Group responsible for delivering large and complex processors as well as High-Speed IO IP’s. In this position, you will be responsible for the design, development and validation of mixed signal circuit components on the project.
- You will be responsible for mixed signal circuit design, circuit checking, device evaluation and characterization, process-aware analog component design, documentation of specifications, prototype construction and checkout, modification and evaluation of semiconductor devices and components, performing developmental and/or test work, reviewing product requirements and logic diagrams, planning and organizing design projects or phases of design projects.
- The responsibilities will span multiple process generations and designs include QPI, PCI-express, DDR, temperature sensor, etc. In addition, you will be mentoring and supervising junior design engineers.
|Candidate Profile :
- Work experience and knowledge of Single-ended memory interfaces (DDR3/DDR4, etc), including transmitter, receiver, Clock distribution, ADC and DAC circuit design, feedback systems and the ability to analyze channel effects such as crosstalk as well as power delivery impact on signal integrity
- Prior experience with the design of high speed I/O > 5Gbps (Receiver, Transmitter, DLL, Clock Recovery, Jitter analysis, and Equalization schemes) would be an added advantage
- Expertise in bench evaluation and measurements techniques for Bit-Error-Rate and Jitter.
- Experience in integrating complex analog blocks in baseline digital process technologies to meet high-volume manufacturing quality standards
- Expertise in transistor-level analog design, block-level integration, and architecture tradeoffs (tools: Cadence* Suite, ADE*)
- An in-depth knowledge of analog layout techniques, including matching, offset minimization, parasitic optimization and floor
- planning, combined with experience of deep submicron technologies.
- High voltage tolerant circuit design and Electrostatic Discharge (ESD) protection strategies
- Ability to implement Matlab* models of interface link, including: signaling for worst case ISI, channel ISI, jitter budgets, Bit Error Rate (BER), bathtub curves, and others
- Proficiency in process/device/technology
|Last Date to Apply Online : 05 Nov 2016
|Company Profile : NA
- Aptitude Test
- Technical and HR Interview
Document Required (Original And photo Copies) :
- SSC Marksheet
- HSC/Diploma Marksheet
- Graduation & Post Graduation all yearsí mark sheets
- Photo ID proof (Pan Card/ Passport / Driving License / College ID)
- 2 photographs